74F604 Datasheet, PDF (5/7 Pages) NXP Semiconductors – Dual octal latch 3-State

Philips Semiconductors
Dual octal latch (3-State)
Product specification
74F604
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS¹
LIMITS
MIN TYP² MAX
UNIT
V_OH
High-level output voltage
V_CC = MIN, V_IL = MAX,
V_IH = MIN, I_OH = MAX
V_OL
Low-level output voltage
V_CC = MIN, V_IL = MAX,
V_IH = MIN, I_OL = MAX
V_IK
Input clamp voltage
V_CC = MIN, I_I = I_IK
I_I
Input current at maximum input
voltage
V_CC = 0.0V, V_I = 7.0V
±10%V_CC
±5%V_CC
±10%V_CC
±5%V_CC
2.4
V
2.7
3.4
V
0.35 0.50
V
0.35 0.50
V
–0.73 –1.2
V
100
µA
I_IH
I_IL
I_OZH
High-level input current
Low-level input current
Off state output current,
High-level voltage applied
V_CC = MAX, V_I = 2.7V
V_CC = MAX, V_I = 0.5V
V_CC = MAX, V_O = 2.7V
20
µA
–20
µA
50
µA
I_OZL
Off state output current,
Low-level voltage applied
V_CC = MAX, V_O = 0.5V
–50
µA
I_OS
Short-circuit output current³
V_CC = MAX
–60
–150
mA
I_CCH
An, Bn, SELECT A/B = 4.5V, LE = ↑
60
82
mA
I_CC
Supply current (total) ^ICCL V_CC = MAX ^{An, Bn, SELECT A/B=GND, LE = ↑}
I_CCZ
An, Bn, SELECT A/B = GND,
LE = GND
75
100
mA
75
100
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V_CC = 5V, T_amb = 25°C.
3. Not more than one output should be shorted at a time. For testing I_OS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I_OS tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
t_PLH
Propagation delay
t_PHL
SELECT A/B to Qn (B latch)
t_PLH
Propagation delay
t_PHL
SELECT A/B to Qn (A latch)
t_PZH
t_PZL
Output Enable time
to High or Low level
t_PHZ
Output Disable time
t_PLZ
from High or Low level
TEST
CONDITION
Waveform 1
Waveform 2
Waveform 4
Waveform 5
Waveform 4
Waveform 5
LIMITS
V_CC = +5V
T_amb = +25°C
C_L = 50pF, R_L = 500Ω
MIN TYP MAX
V_CC = +5V ± 10%
T_amb = 0°C to +70°C
C_L = 50pF, R_L = 500Ω
MIN
MAX
5.0
7.0
9.0
4.5
10.0
6.0
8.5 10.5
5.5
11.5
6.0
8.0 10.0
5.5
11.5
4.0
6.5
8.5
3.5
9.0
5.0
7.5
9.5
4.5
10.5
5.0
7.5
9.5
4.5
11.0
5.0
7.0
9.5
4.5
11.0
5.0
7.0
9.5
4.5
11.0
UNIT
ns
ns
ns
ns
1990 Mar 01
5