74F604 Datasheet, PDF (1/7 Pages) NXP Semiconductors – Dual octal latch 3-State

Philips Semiconductors
Dual octal latch (3-State)
Product specification
74F604
FEATURES
• High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
• Stores 16-bit–wide Data inputs, multiplexed 8-bit outputs
• 3-State outputs
• Power supply current 75mA typical
DESCRIPTION
The 74F604 multiplexed latch is ideal for storing data from two input
buses, A or B, and providing data from either the A or B latches to
the output bus. Organized as 8-bit A and B latches, the latch outputs
are connected by pairs to eight 2-input multiplexers. A Select
(SELECT A/B) input determines whether the A or B latch contents
are multiplexed to the eight 3-State outputs. Data entered from the B
inputs are selected when SELECT A/B is Low; data from the A
inputs are selected when SELECT A/B is High. Data enters the
latches when the Latch Enable (LE) input is Low and is latched on
the LE rising edge. The outputs are enabled when LE is High and
disabled when LE is Low.
PIN CONFIGURATION
LE 1
SELECT A/B 2
A0 3
B0 4
A1 5
B1 6
A2 7
B2 8
A3 9
B3 10
Q3 11
Q2 12
Q1 13
GND 14
28 V_CC
27 A4
26 B4
25 A5
24 B5
23 A6
22 B6
21 A7
20 B7
19 Q7
18 Q6
17 Q5
16 Q4
15 Q0
SF01115
TYPE
74F604
TYPICAL
PROPAGATION
DELAY
7.5ns
TYPICAL SUPPLY CURRENT
(TOTAL)
75mA
ORDERING INFORMATION
DESCRIPTION
28-pin plastic DIP
COMMERCIAL RANGE
V_CC = 5V ±10%, T_amb = 0°C to +70°C
N74F604N
28-pin plastic SOL
N74F604D
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
A0–A7, B0–B7 Data inputs
SELECT A/B Select input
LE
Latch Enable input (active Low)
Q0–Q7
Data outputs
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
74F (U.L.)
HIGH/LOW
1.0/0.033
1.0/0.033
1.0/0.033
150/40
LOAD VALUE
HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
3mA/24mA
1990 Mar 01
1
853–0029 98991