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74F564 Datasheet, PDF (6/10 Pages) NXP Semiconductors – Octal D flip-flop 3-State
Philips Semiconductors
Octal D flip-flop (3-State)
Product specification
74F564
AC WAVEFORMS (Continued)
For all waveforms, VM = 1.5V
The shaded areas indicate when the input is permitted to change for predictable output performance.
VM
VM
Dn
ts(H)
th(H)
CP
VM
VM VM
ts(L)
th(L)
VM
SF00993
Waveform 3. Data Setup and Hold Times
OE
VM
VM
tPZH
tPHZ
VOH -0.3V
Qn
VM
0V
SF00994
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
OE
VM
VM
tPZL
tPLZ
Qn
VM
VOL +0.3V
SF00995
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORM
VCC
VIN
PULSE
GENERATOR
VOUT
RL
D.U.T.
RT
CL RL
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
tPLZ
tPZL
All other
SWITCH
closed
closed
open
7.0V
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
tw
VM
10%
tTHL (tf )
VM
10%
tTLH (tr )
tTLH (tr )
90%
VM
tw
tTHL (tf )
90%
VM
Input Pulse Definition
90%
AMP (V)
0V
AMP (V)
10%
0V
DEFINITIONS:
RL = Load resistor;
see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
INPUT PULSE REQUIREMENTS
family
amplitude VM rep. rate
tw
tTLH
74F
3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
SF00777
1996 Jan 05
6