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PCD6001 Datasheet, PDF (56/96 Pages) NXP Semiconductors – Digital telephone answering machine chip
Table 51 Selection of supported flash devices
FLASH
MEMORY TYPE
NUMBER
OM48101(1)(2)
AT45DB041A(1)
AT45DB081(1)
AT45DB161(1)
AT45DB321
KM29W040
TC58A040F
NM29A040
AM29LV004
AM29LV400
MBM29LV004
M29V040
MADE BY
Philips
ATMEL
ATMEL
ATMEL
ATMEL
Samsung
Toshiba
National Semiconductors
AMD
AMD
Fujitsu
SGS Thomson
INTERFACE
TYPE
SIZE
(Mbit)
MIN. WRITE
SIZE
(bytes)
SPI
4
32
SPI
4
1(3)
SPI
8
1(3)
SPI
16
1(3)
SPI
32
1(3)
mux CAD
4
32
Microwire
4
32
Microwire
4
32
parallel 8
4
1
parallel 8/16 4
1
parallel 8
4
1
parallel 8
4
1
MIN. READ
SIZE
(bytes)
1
1
1
1
1
1
32
32
1
1
1
1
MIN. ERASE
SIZE
(bytes)
2K
264
264
528
528
4K
4K
4K
64K
64K
64K
64K
tACC
(ns)
−
−
−
−
−
100
−
−
100
100
100
120
SUPPLY
(V)
2.5
2.7
3
3
3
3
5
5
3
3
3
3
TYP. STAND-BY
CURRENT
(µA)
2
8
2
3
3
10
50
5
1
1
5
25
Notes
1. Supported by Philips PCD6001 API 1.x software (not all are necessarily supported in parallel at runtime, check actual Philips API specification for
details).
2. Expected to be available from Q2/01. Please check with your local sales organization.
3. With the aid of the internal flash data memory buffers.
Table 52 Memory access time requirement
CASE
1
2
3
4
5
6
MEMORY TYPE
ROM/OTP
CAD/PF
ROM/OTP
CAD/PF
ROM/OTP
CAD/PF
CEN CONNECTION
VSS
VSS
ALE
ALE
PSEN
RD AND WR
OEN OPERATION
PSEN
RD
PSEN
RD
VSS
RD
tACC REQUIREMENT
tACC < (5/2 × Tmicrocontroller_CLK) − delay
tACC < (5 × Tmicrocontroller_CLK) − delay
tACC < (2 × Tmicrocontroller_CLK) − delay
tACC < (9/2 × Tmicrocontroller_CLK) − delay
tACC < (3/2 × Tmicrocontroller_CLK) − delay
tACC < (3 × Tmicrocontroller_CLK) − delay
The delay parameters are defined by the delay (capacitive load) of the address bus, data bus, RD and PSEN pins, the power supply voltage and the
internal delay in the digital memory interface section. As shown in Table 52 there is a trade-off between power consumption and memory speed
requirement.