PCD6001 Datasheet, PDF (28/96 Pages) NXP Semiconductors – Digital telephone answering machine chip

Philips Semiconductors
Digital telephone answering machine chip
Product specification
PCD6001
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SOURCE
EX0
T0
EX1
T1
MSK
I²C-BUS
FS_event
EX2
EX3
EX4
EX5
EX6
TIME_event
DSP_event
RTC_event
EDGE/LEVEL
TCON.0
TCON.2
POLARITY
IX.0
IX.1
IX.2
IX.3
IX.4
XWUD
XWUD.0
to
XWUD.7
FLAGS
TCON.1
TCON.5
TCON.3
TCON.7
MSTAT.0
MSTAT.1
S1CON.3
INTC.0
IRQ1.0
IRQ1.1
IRQ1.2
IRQ1.3
IRQ1.4
IRQ1.5
IRQ1.6
IRQ1.7
clocks
EXP1N
ENABLE
IEN0.0
IEN0.1
IEN0.2
IEN0.3
IEN0.4
IEN0.5
IEN0.6
IEN1.0
IEN1.1
IEN1.2
IEN1.3
IEN1.4
IEN1.5
IEN1.6
IEN1.7
PRIORITY
IP0.0
IP0.1
IP0.2
IP0.3
IP0.4
IP0.5
IP0.6
IP1.0
IP1.1
IP1.2
IP1.3
IP1.4
IP1.5
IP1.6
IP1.7
INTERRUPT
SCANNING
INTERRUPT CONTROLLER
MGM774
Fig.10 PCD6001/80C51 interrupt system.
10.4.1 INTERRUPT PRIORITY REGISTER 0 (IP0)
Table 15 Interrupt Priority Register 0 (SFR address B8H); reset state 00H
7
6
5
4
3
2
− priority FS_event priority TIME priority MSK priority T1 priority EX1
1
priority T0
0
priority EX0
10.4.2 Interrupt Priority Register 1 (IP1)
Table 16 Interrupt Priority Register 1 (SFR address F8H); reset state 00H
7
6
5
4
3
2
1
0
priority RTC priority DSP priority I²C priority EX6 priority EX5 priority EX4 priority EX3 priority EX2
2001 Apr 17
28