LPC1768 Datasheet, PDF (52/72 Pages) NXP Semiconductors – 32-bit ARM Cortex-M3 microcontroller up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

NXP Semiconductors
LPC1768/66/65/64
32-bit ARM Cortex-M3 microcontroller
11.6 USB interface
Table 14. Dynamic characteristics: USB pins (full-speed)
C_L = 50 pF; R_pu = 1.5 kΩ on D+ to V_DD(3V3); unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
t_r
rise time
t_f
fall time
10 % to 90 %
10 % to 90 %
8.5
-
7.7
-
t_FRFM differential rise and fall time matching
t_r / t_f
-
-
V_CRS
output signal crossover voltage
1.3
-
t_FEOPT
t_FDEOP
source SE0 interval of EOP
see Figure 19
source jitter for differential transition to SE0 see Figure 19
transition
160 -
−2
-
t_JR1
t_JR2
t_EOPR1
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
−18.5 -
10 % to 90 %
−9
-
must reject as EOP; see ^[1] 40
-
Figure 19
t_EOPR2 EOP width at receiver
must accept as EOP;
[1] ₈₂
-
see Figure 19
[1] Characterized but not implemented as production test. Guaranteed by design.
Max Unit
13.8 ns
13.7 ns
109 %
2.0
V
175 ns
+5
ns
+18.5 ns
+9
ns
-
ns
-
ns
T_PERIOD
differential
data lines
crossover point
crossover point
extended
differential data to
SE0/EOP skew
n × T_PERIOD + t_FDEOP
Fig 19. Differential data-to-EOP transition skew and EOP width
source EOP width: t_FEOPT
receiver EOP width: t_EOPR1, t_EOPR2
002aab561
LPC1768_66_65_64_2
Objective data sheet
Rev. 02 — 11 February 2009
© NXP B.V. 2009. All rights reserved.
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