SAA7197 Datasheet, PDF (5/16 Pages) NXP Semiconductors – Clock Generator Circuit for desktop video systems CGC

Philips Semiconductors
Clock Generator Circuit for desktop video systems (CGC)
Product specification
SAA7197
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134);
ground pins as well as supply pins together connected.
SYMBOL
V_DDA
V_DDD
V_{diff GND}
V_O
P_tot
T_stg
T_amb
V_ESD
PARAMETER
analog supply voltage (pin 5)
digital supply voltage (pins 8 and 17)
difference voltage V_DDA − V_DDD
output voltage (I_OM = 20 mA)
total power dissipation (DIL20)
storage temperature range
operating ambient temperature range
electrostatic handling⁽¹⁾ for all pins
MIN.
−0.5
−0.5
−
−0.5
0
−65
0
−
MAX.
7.0
7.0
±100
V_DDD
1.1
150
70
tbf
UNIT
V
V
mV
V
W
°C
°C
V
Note
1. Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
recommended to take normal handling precautions appropriate to “Handling MOS devices”.
CHARACTERISTICS
V_DDA = V_DDD = 4.5 to 5.5 V; f_LFCO = 5.5 to 8.0 MHz and T_amb = 0 to 70 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V_DDA
V_DDD
I_DDA
I_DDD
V_reset
analog supply voltage (pin 5)
digital supply voltage (pins 8 and 17)
analog supply current (pin 5)
digital supply current (I₈ + I₁₇)
power-on reset threshold voltage
note 1
Fig.4
4.5
5.0
5.5
V
4.5
5.0
5.5
V
3
−
9
mA
10
−
60
mA
−
3.5
-
V
Input LFCO (pin 11)
V₁₁
V_i
f_LFCO
C₁₁
DC input voltage
input signal (peak-to-peak value)
input frequency range
input capacitance
0
−
1
−
5.5
−
−
−
V_DDA
V_DDA
8.0
10
V
V
MHz
pF
Inputs MS, CE, LFCOSEL and LFCO2 (pins 1, 2, 16 and 19); note 3
V_IL
V_IH
f_LFCO2
I_LI
input voltage LOW
input voltage HIGH
input frequency range for LFCO2
input leakage current
C_I
input capacitance
Output RESN (pin 12)
LFCOSEL
others
0
−
2.0
−
5.5
−
50
−
−
−
−
−
0.8
V_DDD
8.0
150
10
5
V
V
MHz
µA
µA
pF
V_OL
output voltage LOW
V_OH
output voltage HIGH
t_d
RESN delay time
I_OL = 2 mA
0
−
I_OH = −0.5 mA
2.4
−
C₃ = 0.1 µF; Fig.4 20
−
0.4
V
V_DDD V
200 ms
August 1996
5