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| PSMN050-80BS_15 Datasheet, PDF (5/14 Pages) NXP Semiconductors – N-channel 80 V 46 mΩ standard level MOSFET in D2PAK | |||
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NXP Semiconductors
PSMN050-80BS
N-channel 80 V 46 m⦠standard level MOSFET in D2PAK
6. Characteristics
Table 6. Characteristics
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source
breakdown voltage
gate-source threshold
voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11; see Figure 12
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11; see Figure 12
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11; see Figure 12
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 80 V; VGS = 0 V; Tj = 25 °C
VDS = 80 V; VGS = 0 V; Tj = 125 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 10 A; Tj = 100 °C;
see Figure 13
VGS = 10 V; ID = 10 A; Tj = 25 °C
RG
internal gate resistance f = 1 MHz
(AC)
Dynamic characteristics
QG(tot)
QGS
QGS(th)
total gate charge
gate-source charge
pre-threshold
gate-source charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14; see Figure 15
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14
QGS(th-pl)
post-threshold
gate-source charge
QGD
gate-drain charge
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14; see Figure 15
VGS(pl)
gate-source plateau
voltage
VDS = 40 V
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 17
VDS = 12 V; RL = 0.5 â¦; VGS = 10 V;
RG(ext) = 4.7 â¦
Min Typ Max Unit
73 -
-
V
80 -
-
V
1
-
-
V
-
-
4.6 V
2
3
4
V
-
-
1
µA
-
-
15 µA
-
-
100 nA
-
-
100 nA
-
-
74
mâ¦
-
37
46
mâ¦
-
2
-
â¦
-
9
-
nC
-
11
-
nC
-
3.8 -
nC
-
1.9 -
nC
-
1.9 -
nC
-
2.3 -
nC
-
5.2 -
V
-
633 -
pF
-
100 -
pF
-
50 -
pF
-
9.2 -
ns
-
1
-
ns
-
16 -
ns
-
2.4 -
ns
PSMN050-80BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 2 March 2012
© NXP B.V. 2012. All rights reserved.
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