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| PSMN034-100BS_15 Datasheet, PDF (5/14 Pages) NXP Semiconductors – N-channel 100 V 34.5 mΩ standard level MOSFET in D2PAK | |||
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NXP Semiconductors
PSMN034-100BS
N-channel 100 V 34.5 m⦠standard level MOSFET in D2PAK.
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source
breakdown voltage
gate-source threshold
voltage
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11; see Figure 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10; see Figure 11
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 100 V; VGS = 0 V; Tj = 125 °C
VDS = 100 V; VGS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 175 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13
RG
internal gate resistance f = 1 MHz
(AC)
Dynamic characteristics
QG(tot)
total gate charge
ID = 15 A; VDS = 50 V; VGS = 10 V;
see Figure 14; see Figure 15
ID = 0 A; VDS = 0 V; VGS = 10 V
QGS
gate-source charge ID = 15 A; VDS = 50 V; VGS = 10 V;
see Figure 14; see Figure 15
QGS(th)
pre-threshold
gate-source charge
ID = 15 A; VDS = 50 V; VGS = 10 V;
see Figure 14
QGS(th-pl)
post-threshold
gate-source charge
QGD
gate-drain charge
ID = 15 A; VDS = 50 V; VGS = 10 V;
see Figure 14; see Figure 15
VGS(pl)
gate-source plateau
voltage
VDS = 50 V; see Figure 14;
see Figure 15
Ciss
input capacitance
VDS = 50 V; VGS = 0 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; see Figure 16
Crss
reverse transfer
capacitance
Min Typ Max Unit
90 -
-
V
100 -
-
V
1
-
-
V
2
3
4
V
-
-
4.8 V
-
-
50 µA
-
0.02 1
µA
-
10 100 nA
-
10 100 nA
-
-
62
mâ¦
-
82.1 96
mâ¦
-
29.3 34.5 mâ¦
-
1
-
â¦
-
23.8 -
nC
-
19 -
nC
-
5.5 -
nC
-
3.6 -
nC
-
1.9 -
nC
-
6.9 -
nC
-
4.4 -
V
-
1201 -
pF
-
94 -
pF
-
61 -
pF
PSMN034-100BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 2 March 2012
© NXP B.V. 2012. All rights reserved.
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