74HC_HCT597_15 Datasheet, PDF (5/23 Pages) NXP Semiconductors – 8-bit shift register with input flip-flops

NXP Semiconductors
74HC597; 74HCT597
8-bit shift register with input flip-flops
6. Functional description
Table 3. Function table^[1]
Inputs
STCP
SHCP
PL
MR

X
X
X

X
L
H
no clock edge X
L
H
X
X
L
L
X
X
H
L
X

H
H
[1] H = HIGH voltage level.
L = LOW voltage level.
X = don’t care.
 = positive-going transition.
Function
data loaded to input latches
data loaded from inputs to shift register
data transferred from input flip-flops to shift register
invalid logic, state of shift register is indeterminate
when signals removed
shift register cleared
shift register clocked Qn = Qn1, Q0 = DS
6+&3
'6
05
3/
67&3
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+
'
/
'
+
'
/
'
+
'
+
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/
'
+
4
/
/+ / +
UHVHW
VKLIW
UHJLVWHU
VHULDOVKLIW
ORDGLQSXW
UHJLVWHU
SDUDOOHOORDG
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Fig 7. Timing diagram
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/
/
/
/
/
/
/
/
+
/
+
/
/
+
/
+ / + / + /+
/ //
/
VHULDOVKLIW
VHULDOVKLIW
/ ++
VHULDOVKLIW
ORDGLQSXW
UHJLVWHU
SDUDOOHOORDG
VKLIWUHJLVWHU
SDUDOOHOORDGERWK
LQSXWDQGVKLIWUHJLVWHUV
DDD
74HC_HCT597
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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