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74HC_HCT597_15 Datasheet, PDF (11/23 Pages) NXP Semiconductors – 8-bit shift register with input flip-flops
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NXP Semiconductors
74HC597; 74HCT597
8-bit shift register with input flip-flops
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 14.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
74HCT597
tpd
propagation SHCP to Q; see Figure 8 [1]
delay
VCC = 4.5 V
-
23 40
-
50
-
60 ns
VCC = 5.0 V; CL = 15 pF
-
20 -
-
-
-
-
ns
MR to Q; see Figure 9
[1]
VCC = 4.5 V
-
28 49
-
61
-
74 ns
STCP to Q; see Figure 8 [1]
VCC = 4.5 V
-
33 57
-
71
-
86 ns
VCC = 5.0 V; CL = 15 pF
-
29 -
-
-
-
-
ns
PL to Q; see Figure 10
[1]
VCC = 4.5 V
-
30 52
-
65
-
78 ns
VCC = 5.0 V; CL = 15 pF
-
26 -
-
-
-
-
ns
tt
transition see Figure 8
time
VCC = 4.5 V
[2]
-
7 15
-
19
-
22 ns
tW
pulse width STCP HIGH or LOW;
see Figure 8
VCC = 4.5 V
SHCP HIGH or LOW;
see Figure 8
16 6
-
20
-
24
-
ns
VCC = 4.5 V
MR LOW; see Figure 9
16 7
-
20
-
24
-
ns
VCC = 4.5 V
PL LOW; see Figure 10
25 14
-
31
-
38
-
ns
VCC = 4.5 V
trec
recovery MR to SHCP; see
time
Figure 11
20 10
-
25
-
30
-
ns
VCC = 4.5 V
tsu
set-up time Dn to STCP; see
Figure 12
12 2
-
15
-
18
-
ns
VCC = 4.5 V
DS to SHCP; see
Figure 12
12 5
-
15
-
18
-
ns
VCC = 4.5 V
PL to SHCP; see
Figure 13
12 2
-
15
-
18
-
ns
VCC = 4.5 V
12 4
-
15
-
18
-
ns
74HC_HCT597
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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