74HC_HCT597_15 Datasheet, PDF (12/23 Pages) NXP Semiconductors – 8-bit shift register with input flip-flops

NXP Semiconductors
74HC597; 74HCT597
8-bit shift register with input flip-flops
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); C_L = 50 pF unless otherwise specified; for test circuit, see Figure 14.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
t_h
hold time Dn to STCP; see
Figure 12
V_CC = 4.5 V
PL, DS to SHCP; see
Figure 12
5 1 -
5
-
5
-
ns
V_CC = 4.5 V
5 2 -
5
-
5
-
ns
f_max
maximum SHCP; see Figure 8
frequency
V_CC = 4.5 V
30 75
-
24
-
20
-
MHz
V_CC = 5.0 V; C_L = 15 pF
-
83 -
-
-
-
-
MHz
C_PD
power
C_L = 50 pF; f = 1 MHz;
[3] _-
32 -
-
-
-
-
pF
dissipation V_I = GND to V_CC  1.5 V
capacitance
[1] t_pd is the same as t_PLH and t_PHL.
[2] t_t is the same as t_THL and t_TLH.
[3] C_PD is used to determine the dynamic power dissipation (P_D in W).
P_D = C_PD  V_CC2  f_i  N + (C_L  V_CC2  f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in V;
N = number of inputs switching;
(C_L  V_CC2  f_o) = sum of outputs.
11. Waveforms
9_,
67&36+&3
LQSXW
*1'
9₂₊
4RXWSXW
9_2/
I_PD[
9₀
W_:
W_3/+
9₀
W_3+/
DDD
Fig 8.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Shift clock and storage clock inputs to output, propagation delays, pulse widths and maximum clock
frequency
74HC_HCT597
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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