74HC40104 Datasheet, PDF (5/8 Pages) NXP Semiconductors – 4-bit bidirectional universal shift register; 3-state

Philips Semiconductors
4-bit bidirectional universal shift register;
3-state
Product specification
74HC/HCT40104
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I_CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_PHL/ t_PLH propagation delay
CP to Q_n
44 170
215
16 34
43
13 29
37
t_PZH/ t_PZL 3-state output enable time
33 150
190
OE to Q_n
12 30
38
10 26
33
255 ns
51
43
225 ns
45
38
2.0 Fig.6
4.5
6.0
2.0 Fig.8
4.5
6.0
t_PHZ/ t_PLZ 3-state output disable time
50 150
190
OE to Q_n
18 30
38
14 26
33
225 ns
45
38
2.0 Fig.8
4.5
6.0
t_THL/ t_TLH output transition time
t_W
clock pulse width
HIGH or LOW
14 60
5 12
4 10
80 11
16 4
14 3
75
15
13
100
20
17
90
18
15
120
24
20
ns 2.0 Fig.6
4.5
6.0
ns 2.0 Fig.6
4.5
6.0
t_su
set-up time
80 17
D_n, D_SR, D_SL to CP
16 6
14 5
100
120
20
24
17
20
ns 2.0 Fig.8
4.5
6.0
t_su
set-up time
S₀, S₁ to CP
80 22
16 8
14 6
100
120
20
24
17
20
t_h
hold time
2 −8
2
2
D_n, D_SR, D_SL to CP
2 −3
2
2
2 −2
2
2
t_h
hold time
S₀, S₁ to CP
2 −14
2
2
2 −5
2
2
2 −4
2
2
f_max
maximum clock pulse
6.0 19
4.8
4.0
frequency
30 56
24
20
35 67
28
24
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
ns 2.0
4.5
6.0
MHz 2.0
4.5
6.0
Fig.8
Fig.8
Fig.8
Fig.6
December 1990
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