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74F385 Datasheet, PDF (5/6 Pages) NXP Semiconductors – Quad serial adder/subtractor
Philips Semiconductors
Quad serial adder/subtractor
Product specification
74F385
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
fMAX
tPLH
tPHL
tPLH
Maximum clock frequency
Propagation delay,
Cn to Fn
Propagation delay, MR to Fn
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
ts (H)
ts (L)
th (H)
th (L)
ts (H)
ts (L)
tw (L)
tREC (L)
Setup time, High or Low
An, Bn or Sn to CP
Hold time, High or Low
An, Bn or Sn to CP
CP Pulse width
High or Low
MR Pulse width
Low
Recovery time
MR to CP
TEST
CONDITION
Waveform 1
Waveform 1
Waveform 2
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN
MAX
105 140
90
3.0
5.0
8.0
2.5
9.0
3.5
5.5
9.0
3.5
10.0
4.0
6.5
9.5
4.0
10.5
UNIT
MHz
ns
ns
TEST
CONDITION
Waveform 3
Waveform 3
Waveform 2
Waveform 2
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN TYP MAX
MIN
MAX
12.0
12.0
12.0
12.0
0
0
0
0
6.0
6.0
6.0
6.0
UNIT
ns
ns
ns
6.0
6.0
ns
Waveform 2
8.5
9.5
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performances.
CP VM
1/fmax
tw(H)
tPHL
VM
tw(L)
VM
tPLH
MR
VM
VM
tW (L)
tREC
CP
VM
Fn
VM
VM
SF00932
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
tPHL
Fn
VM
Waveform 2. Master Reset Pulse Width,
Master Reset to Output Delay and
Master Reset to Clock Recovery Time
SF00933
An, Bn, Sn
VM
VM
ts(H) th(H)
VM
ts(L)
VM
th(L)
CP
VM
VM
SF00934
Waveform 3. Data and Select Setup and Hold Times
1989 Sep 20
5