TDA8501 Datasheet, PDF (4/30 Pages) NXP Semiconductors – PAL/NTSC encoder

Philips Semiconductors
PAL/NTSC encoder
Preliminary specification
TDA8501
Fig.2 Pin configuration.
PINNING
U and V respectively, are the terms used to describe the colour difference signals at the output of the matrix.
SYMBOL
−(R−Y)
MCONTROL
−(B−Y)
H/2
Y
U OFFSET
R
V_CC
G
V_SS
B
V OFFSET
V_REF
CHROMA
FLT
CVBS
PIN
DESCRIPTION
1 colour difference input signal, for EBU bar (75%) 1.05 V (p-p)
2 multiplexer switch control input; HIGH = RGB, LOW = −(R−Y), −(B−Y), Y
3 colour difference input signal, for EBU bar (75%) 1.33 V (p-p)
4 line pulse input/output divided-by-2 for synchronizing the internal H/2, if not used, this pin
dependent on mode selected, is either left open-circuit, or connected to V_CC or to ground
(note 1)
5 luminance input signal 1 V nominal without sync
6 U modulator offset control capacitor
7 RED input signal for EBU bar of 75% 0.7 V (p-p)
8 supply voltage; 5 V nominal
9 GREEN input signal for EBU bar of 75% 0.7 V (p-p)
10 ground (0 V)
11 BLUE input signal for EBU bar of 75% 0.7 V (p-p)
12 V modulator offset control capacitor
13 2.5 V internal reference voltage output
14 chrominance output
15 filter tuning loop capacitor
16 composite PAL or NTSC output, 2 V (p-p) nominal
April 1993
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