TDA8501 Datasheet, PDF (16/30 Pages) NXP Semiconductors – PAL/NTSC encoder

Philips Semiconductors
PAL/NTSC encoder
Preliminary specification
TDA8501
SYMBOL
PARAMETER
CONDITIONS
PAL mode; pin 17 = 0 V
V_SYNC
V_Y
V_DIF
sync voltage amplitude
Y voltage amplitude
difference between black and
blanking level
NTSC mode; pin 17 = 5 V and pin 4 open-circuit or ground
V_SYNC
V_Y
V_DIF
sync voltage amplitude
Y voltage amplitude
difference between black and
blanking level
BW
frequency response
pin 22 with external
load of R = 10 kΩ and
C = 10 pF
group delay tolerance
t_d
sync delay from pin 24 to pin 22
t_d
Y delay from pin 5 to pin 22
α
Chrominance cross talk
0 dB = 1330 mV
(peak-to-peak)
= 75% RED
Y + SYNC IN (pin 20 from delay circuit; note 2)
I_bias
input bias current
V_I
maximum voltage amplitude
Y + SYNC OUT (pin 19 output Y (SVHS); note 2)
R_O
I_sink
I_source
V_BL
G
BW
output resistance
maximum sink current
maximum source current
black level output voltage
Y + SYNC gain;
from pin 20 to pin 19
frequency response
group delay tolerance
α
Chrominance cross talk
pin 19 with external
load of R = 10 kΩ and
C = 10 pF
0 dB = 1330 mV
(peak-to-peak)
= 75% RED
MIN.
285
665
−
270
628
−
10
−
220
−
−
−
−
−
650
1000
−
−
10
−
−
TYP.
300
700
0
286
661
53
−
−
290
10
−
−
−
120
−
−
1.65
12
−
−
−
MAX. UNIT
315 mV
735 mV
−
mV
300 mV
694 mV
−
mV
−
MHz
20
ns
360 ns
−
ns
−60 dB
1
µA
1
V
−
Ω
−
µA
−
µA
−
V
−
dB
−
MHz
20
ns
−54 dB
April 1993
16