TDA8501 Datasheet, PDF (18/30 Pages) NXP Semiconductors – PAL/NTSC encoder

Philips Semiconductors
PAL/NTSC encoder
Preliminary specification
TDA8501
SYMBOL
PARAMETER
CVBS output (pin 16)
I_sink
I_source
V_O
G
maximum sink current
maximum source current
DC voltage level
Y +SYNC gain;
from pin 20 to pin 16
G
chrominance difference;
from pin 14 to pin 16
G_ø
differential phase
G_V
differential gain
R_O
output resistance
Oscillator output (pin 23)
OSC
series-resonance
Filter tuning loop (pin 15)
V_DC
V_DC
V_DCL
V_DCH
DC control voltage level NTSC
DC control voltage level PAL
limited DC-level LOW
limited DC-level HIGH
H2 (pin 4)
V_IL
V_IH
I_I
I_O
V_O
V_O
I_sink
I_source
LOW level input voltage
HIGH level input voltage
current for forcing HIGH
current for forcing LOW
voltage out LOW
voltage out HIGH
maximum sink current
maximum source current
Composite sync input (pin 24)
V_SYNC
I_I
I_O
SYNC pulse amplitude
slicing level
input current
maximum output current during
SYNC
BURST ADJ (pin 21; note 5)
BP
DC voltage level
CONDITIONS
MIN.
TYP. MAX. UNIT
Y +SYNC = 0
note 3
note 4
650
−
−
1000
−
−
−
1.6
−
−
12
−
−
0
−
−
−
3
−
−
3
−
120
−
µA
µA
V
dB
dB
degrees
dB
Ω
the resonance resistance of the crystal should be < 60 Ω and the
parallel capacitance of the crystal should be < 10 pF.
I_O = 200 µA
I_I = 200 µA
inactive
active
−
0.83
−
V
−
0.88
−
V
−
0.27
−
V
−
1.8
−
V
0
−
4
−
220
−
260
−
−
−
4
−
50
−
50
−
1
V
5
V
−
µA
−
µA
< 0.5 V
−
V
−
µA
−
µA
75
300
600 mV (p-p)
−
50
−
%
−
4
−
µA
−
100
−
µA
−
V_REF
−
V
(V13)
April 1993
18