PSMN004-25B Datasheet, PDF (4/9 Pages) NXP Semiconductors – N-channel logic level TrenchMOS transistor

Philips Semiconductors
Product specification
N-channel logic level TrenchMOS™ transistor PSMN004-25B, PSMN004-25P
Normalised Power Derating, PD (%)
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
Mounting Base temperature, Tmb (C)
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
Normalised Current Derating, ID (%)
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100 125 150 175
Mounting Base temperature, Tmb (C)
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb)
1000 ^{Peak Pulsed Drain Current, IDM (A)}
RDS(on) = VDS/ ID
100
D.C.
10
tp = 10 us
100 us
1 ms
10 ms
100 ms
1
1
10
100
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
1 ^{Transient thermal impedance, Zth j-mb (K/W)}
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
PD _tp D = tp/T
single pulse
0.001
1E-06
1E-05
1E-04 1E-03 1E-02
Pulse width, tp (s)
T
1E-01
1E+00
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
100 ^{Drain Current, ID (A)}
10 V
90
5V
80
4.5 V
70
2.8 V
Tj = 25 C
VGS = 2.6 V
60
50
2.4 V
40
30
20
10
0
0
2.2 V
2V
1.8 V
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS)
Drain-Source On Resistance, RDS(on) (Ohms)
0.02
2V
0.018
2.2 V
2.4 V
2.6 V
0.016
0.014
0.012
0.01
0.008
2.8 V
0.006
0.004
0.002
Tj = 25 C
0
0 10 20
30 40 50 60 70
Drain Current, ID (A)
5 V _{4.5 V}
VGS = 10V
80 90 100
Fig.6. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D)
October 1999
4
Rev 1.100