PHW14N50E Datasheet, PDF (4/7 Pages) NXP Semiconductors – PowerMOS transistors Avalanche energy rated

Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Drain current, ID (A)
20
18 ^{VDS > ID X RDS(ON)}
PHW14N50E
16
14
12
10
150 C
8
Tj = 25 C
6
4
2
0
0
1
2
3
4
5
6
7
8
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
I_D = f(V_GS); parameter T_j
Transconductance, gfs (S)
14
13 VDS > ID X RDS(ON)
12
11
10
9
8
7
6
5
4
3
2
1
0
Tj = 25 C
PHW14N50E
150 C
0 2 4 6 8 10 12 14 16 18 20
Drain current, ID (A)
Fig.8. Typical transconductance.
g_fs = f(I_D); parameter T_j
a
2
Normalised RDS(ON) = f(Tj)
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 7 A; V_GS = 10 V
Product specification
PHW14N50E
VGS(TO) / V
4
3
2
max.
typ.
min.
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 0.25 mA; V_DS = V_GS
1E-01 ^{ID / A}
SUB-THRESHOLD CONDUCTION
1E-02
1E-03
2%
typ
98 %
1E-04
1E-05
1E-06
0
1
2
3
4
VGS / V
Fig.11. Sub-threshold drain current.
I_D = f(V_GS); conditions: T_j = 25 ˚C; V_DS = V_GS
Capacitances, Ciss, Coss, Crss (pF)
10000
PHW14N50E
1000
Ciss
Coss
100
0.1
1
10
Drain-Source Voltage, VDS (V)
Crss
100
Fig.12. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_GS = 0 V; f = 1 MHz
December 1998
4
Rev 1.000