PHW14N50E Datasheet, PDF (3/7 Pages) NXP Semiconductors – PowerMOS transistors Avalanche energy rated

Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb); conditions: V_GS ≥ 10 V
Peak Pulsed Drain Current, IDM (A)
100
RDS(on) = VDS/ ID
10
d.c.
1
PHW14N50E
tp = 10 us
100 us
1 ms
10 ms
100 ms
0.1
10
100
Drain-Source Voltage, VDS (V)
1000
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Product specification
PHW14N50E
Peak Pulsed Drain Current, IDM (A)
1
D = 0.5
PHW14N50E
0.2
0.1
0.1
0.05
0.02
0.01
single pulse
P_{D tp} D = tp/T
0.001
1E-06
1E-05
T
1E-04 1E-03 1E-02
Pulse width, tp (s)
1E-01
1E+00
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
Drain Current, ID (A)
14
Tj = 25 C
12
10
PHW14N50E
VGS = 10 V
6V
8
5V
6
4.8 V
4
4.6 V
4.4 V
2
4.2 V
4V
0
0
1
2
3
4
5
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics.
I_D = f(V_DS); parameter V_GS
Drain-Source On Resistance, RDS(on) (Ohms) PHW14N50E
1
4V _{4.4 V 4.6 V} 4.8V
0.9
4.2V
0.8
5V
Tj = 25 C
0.7
0.6
0.5
VGS = 6 V
0.4
0.3
10V
0.2
0.1
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Drain Current, ID (A)
Fig.6. Typical on-state resistance.
R_DS(ON) = f(I_D); parameter V_GS
December 1998
3
Rev 1.000