BUK554-60H Datasheet, PDF (4/7 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
Product specification
BUK554-60H
ID / A
80
BUK564-60H
60
Tj / C = -40
150
40
25
20
0
0
2
4
6
8
10
VGS / V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
gfs / S
20
10
BUK564-60H
-40
25
Tj / C = 150
0
0
20
40
60
80
ID / A
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
a
2.0
Normalised RDS(ON) = f(Tj)
1.5
1.0
0.5
0
-60
-20
20
60
100
140
180
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 20 A; V_GS = 5 V
VGS(TO) / V
2
1
max.
typ.
min.
0
-60
-20
20
60
100
140
180
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
1E-01 ^{ID / A}
SUB-THRESHOLD CONDUCTION
1E-02
1E-03
2%
typ
98 %
1E-04
1E-05
1E-06
0
1
2
3
4
VGS / V
Fig.11. Sub-threshold drain current.
I_D = f(V_GS); conditions: T_j = 25 ˚C; V_DS = V_GS
C / pF
10000
BUK564-60H
1000
Ciss
Coss
Crss
100
0
20
40
VDS / V
Fig.12. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_GS = 0 V; f = 1 MHz
August 1996
4
Rev 1.000