BUK554-60H Datasheet, PDF (3/7 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
Product specification
BUK554-60H
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
ID%
120
110
100
90
80
70
60
50
Normalised Current Derating
40
30
20
10
0
0
20 40 60 80 100 120 140 160 180
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb); conditions: V_GS ≥ 5 V
ID / A
1000
BUK564-60H
100
RDS(ON) ^{= VDS/ID}
tp =
10 us
100 us
10
1 ms
DC
10 ms
100 ms
1
1
10
100
VDS / V
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth(j-mb) K/W
10
BUK464-60H
D=
1
0.5
0.2
0.1 ^0.1
0.05
0.02
0.01
0
P_D
tp
D
=
tp
T
0.001
1E-07
1E-05
1E-03
T
t
1E-01
1E+01
tp / sec
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
ID / A
100
BUK564-60H
10
80
VGS / V =
8
6
60
5
4.5
40
4
3.5
20
3
2.5
0
0
1
2
3
4
5
VDS / V
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON) / Ohm
0.1 _{2.5 3}
3.5
0.08
BUK564-60H
4
4.5
5
VGS / V =
0.06
6
8
0.04
10
0.02
0
0
20
40
60
80
100
ID / A
Fig.6. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
August 1996
3
Rev 1.000