74ABT161543 Datasheet, PDF (4/12 Pages) NXP Semiconductors – 16-bit latched transceiver with dual enable and master reset 3-State

Philips Semiconductors
16-bit latched transceiver with dual enable
and master reset (3-State)
Product specification
74ABT161543
74ABTH161543
LOGIC SYMBOL
5 6 8 9 10 12 13 14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
3
1EAB
54
1EBA
2
1LEAB
55
1LEBA
MRab
4
1OEAB
1
1OEBA
56
MRba
25
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
52 51 49 48 47 45 44 43
15 16 17 19 20 21 23 24
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
26
2EAB
31
2EBA
27
2LEAB
30
2LEBA
MRab
4
2OEAB
28
2OEBA
29
MRba
25
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
42 41 40 38 37 36 34 33
SH00064
FUNCTIONAL DESCRIPTION
The 74ABT161543 contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB) input and the A-to-B Latch
Enable (nLEAB) input are Low the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and nOEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA,
nLEBA, and nOEBA inputs.
FUNCTION TABLE
INPUTS
OUTPUTS
nOEXX
nMRXX
nEXX
nLEXX
nAx or nBx
nBx or nAx
L
L
L
X
X
L
H
X
X
X
X
Z
X
X
H
X
X
Z
L
H
↑
L
h
Z
L
H
↑
L
l
Z
L
H
L
↑
h
H
L
H
L
↑
l
L
L
H
L
L
H
H
L
H
L
L
L
L
L
H
L
H
X
NC
H=
h=
L=
l=
X=
↑=
NC=
Z=
High voltage level
High voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
Low voltage level
Low voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
Don’t care
Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
No change
High impedance or “off” state
STATUS
Clear
Disabled
Disabled
Disabled + Latch
Latch + Display
Transparent
Hold
1998 Feb 27
4