XA-G3 Datasheet, PDF (32/36 Pages) NXP Semiconductors – XA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs

Philips Semiconductors
XA 16-bit microcontroller family
32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
Product specification
XA-G3
EPROM CHARACTERISTICS
The XA-G37 is programmed by using a modified Improved
Quick-Pulse Programming™ algorithm. This algorithm is essentially
the same as that used by the later 80C51 family EPROM parts.
However different pins are used for many programming functions.
Detailed EPROM programming information may be obtained from
the internet at www.philipsmcu.com/ftp.html.
The XA-G3 contains three signature bytes that can be read and
used by an EPROM programming system to identify the device. The
signature bytes identify the device as an XA-Gx manufactured by
Philips.
Security Bits
With none of the security bits programmed the code in the program
memory can be verified. When only security bit 1 (see Table 6) is
programmed, MOVC instructions executed from external program
memory are disabled from fetching code bytes from the internal
memory. All further programming of the EPROM is disabled. When
security bits 1 and 2 are programmed, in addition to the above,
verify mode is disabled. When all three security bits are
programmed, all of the conditions above apply and all external
program memory execution is disabled. (See Table 6)
Table 6. Program Security Bits
PROGRAM LOCK BITS
SB1 SB2 SB3 PROTECTION DESCRIPTION
1
U
U
U No Program Security features enabled.
2
P
U
U MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory and further programming of the EPROM is disabled.
3
P
P
U Same as 2, also verify is disabled.
4
P
P
P Same as 3, external execution is disabled. Internal data RAM is not accessible.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
ROM CODE SUBMISSION
When submitting ROM code for the XA-G33, the following must be specified:
1. 32k bytes user ROM data.
2. ROM security bits.
ADDRESS
0000H to 7FFFH
CONTENT
DATA
BIT(S)
7:0
8020H
SECURITY BIT
0
8020H
SECURITY BIT
1
8020H
SECURITY BIT
3
COMMENT
User ROM Data
ROM Security Bit 1
0 = enable security
1 = disable security
ROM Security Bit 2
0 = enable security
1 = disable security
ROM Security Bit 3
0 = enable security
1 = disable security
™Trademark phrase of Intel Corporation.
1999 Apr 07
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