XA-G3 Datasheet, PDF (2/36 Pages) NXP Semiconductors – XA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs

Philips Semiconductors
XA 16-bit microcontroller family
32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
Product specification
XA-G3
FAMILY DESCRIPTION
The Philips Semiconductors XA (eXtended Architecture) family of
16-bit single-chip microcontrollers is powerful enough to easily
handle the requirements of high performance embedded
applications, yet inexpensive enough to compete in the market for
high-volume, low-cost applications.
The XA family provides an upward compatibility path for 80C51
users who need higher performance and 64k or more of program
memory. Existing 80C51 code can also easily be translated to run
on XA microcontrollers.
The performance of the XA architecture supports the
comprehensive bit-oriented operations of the 80C51 while
incorporating support for multi-tasking operating systems and
high-level languages such as C. The speed of the XA architecture,
at 10 to 100 times that of the 80C51, gives designers an easy path
to truly high performance embedded control.
The XA architecture supports:
• Upward compatibility with the 80C51 architecture
• 16-bit fully static CPU with a 24-bit program and data address
range
• Eight 16-bit CPU registers each capable of performing all
arithmetic and logic operations as well as acting as memory
pointers. Operations may also be performed directly to memory.
• Both 8-bit and 16-bit CPU registers, each capable of performing
all arithmetic and logic operations.
• An enhanced instruction set that includes bit intensive logic
operations and fast signed or unsigned 16 × 16 multiply and
32 / 16 divide
• Instruction set tailored for high level language support
• Multi-tasking and real-time executives that include up to 32
vectored interrupts, 16 software traps, segmented data memory,
and banked registers to support context switching
• Low power operation, which is intrinsic to the XA architecture,
includes power-down and idle modes.
More detailed information on the core is available in the XA User
Guide.
SPECIFIC FEATURES OF THE XA-G3
• 20-bit address range, 1 megabyte each program and data space.
(Note that the XA architecture supports up to 24 bit addresses.)
• 2.7V to 5.5V operation
• 32K bytes on-chip EPROM/ROM program memory =
XA-G37/XA-G33
• 512 bytes of on-chip data RAM
• Three counter/timers with enhanced features
(equivalent to 80C51 T0, T1, and T2)
• Watchdog timer
• Two enhanced UARTs
• Four 8-bit I/O ports with 4 programmable output configurations
• 44-pin PLCC and 44-pin LQFP packages
ORDERING INFORMATION
ROMless
ROM
EPROM¹
TEMPERATURE RANGE °C AND PACKAGE
P51XAG30KB BD P51XAG33KB BD PXAG37KB BD OTP 0 to +70, Plastic Low Profile Quad Flat Pkg.
P51XAG30KB A P51XAG33KB A PXAG37KB A OTP
0 to +70, Plastic Leaded Chip Carrier
P51XAG30KF BD P51XAG33KF BD PXAG37KF BD OTP –40 to +85, Plastic Low Profile Quad Flat Pkg.
P51XAG30KF A P51XAG33KF A
PXAG37KF A OTP
NOTE:
1. OTP = One Time Programmable EPROM. UV = Erasable EPROM.
–40 to +85, Plastic Leaded Chip Carrier
FREQ
(MHz)
30
30
30
30
DRAWING
NUMBER
SOT389–1
SOT187–2
SOT389–1
SOT187–2
1999 Apr 07
2
853-2052 21197