SA5217 Datasheet, PDF (3/12 Pages) NXP Semiconductors – Postamplifier with link status indicator

Philips Semiconductors
Postamplifier with link status indicator
Product specification
SA5217
PIN DESCRIPTIONS
PIN SYMBOL
NO.
DESCRIPTION
1 LED
Output for the LED driver. Open collector output transistor with 125Ω series limiting resistor. An above threshold signal
turns this transistor ON.
2 C_PKDET Capacitor for the peak detector. The value of this capacitor determines the detector response time to the signal, supple-
menting the internal 10pF capacitor.
3 THRESH Peak detector threshold resistor. The value of this resistor determines the threshold level of the peak detector.
4 GND_A
5 FLAG
Device analog ground pin.
Peak detector digital output. When this output is LOW, there is data present above the threshold. This pin is normally
connected to the JAM pin and has a TTL fanout of two.
6 JAM
Input to inhibit data flow. Sending the pin HIGH forces TTL DATA OUT ON, Pin 10, LOW. This pin is normally connected
to the FLAG pin and is TTL-compatible.
7 V_CCD
8 V_CCA
9 GND_D
10 V_OUT
11 R_PKDET
12 R_HYST
13 IN_8A
14 OUT_2A
15 IN_8B
16 OUT_2B
17 C_AZN
Power supply pin for the digital portion of the chip.
Power supply pin for the analog portion of the chip.
Device digital ground pin.
TTL output pin with a fanout of five.
Peak detector current resistor. The value of this resistor determines the amount of discharge current available to the
peak detector capacitor, C_PKDET.
Peak detector hysteresis resistor. The value of this resistor determines the amount of hysteresis in the peak detector.
Non-inverting input to amplifier A8.
Non-inverting output of amplifier A2.
Inverting input to amplifier A8.
Inverting output of amplifier A2.
Auto-Zero capacitor pin (Negative terminal). The value of this capacitor determines the low-end frequency response of
the preamp A1.
18 C_AZP
Auto-Zero capacitor pin (Positive terminal). The value of this capacitor determines the low-end frequency response of the
preamp A1.
19 IN_1A
20 IN_1B
Non-inverting input of the preamp A1.
Inverting input of the preamp A1.
BLOCK DIAGRAM
IN_1B ²⁰
19 ^A1
IN_1A
C_AZP ¹⁸
C_AZN ¹⁷
V_CCA
8
V_CCD OUT_2A OUT_2B
7
14 16
GATED AMP
A2
IN_8B IN_8A
15 13
SCHMITT TRIGGER
A8
10
V_OUT
A6 ^{OUTPUT DISABLE}
6 _JAM
11
R_PKDET
PEAK DETECT
A3
A4
A5
5 _FLAG
1 _LED
A7
LED DRIVER
4
9
3
HYSTERESIS
2
12
GND_A GND_D THRESH
C_PKDET
R_HYST
Figure 2. Block Diagram
SD00355
1998 Oct 07
3