IRF840 Datasheet, PDF (3/7 Pages) Motorola, Inc – N-CHANNEL ENHANCEMENT-MODE SILICON GATE TMOS POWER FIELD EFFECT TRANSISTOR

Philips Semiconductors
PowerMOS transistor
Avalanche energy rated
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb); conditions: V_GS ≥ 10 V
ID / A
100
10
RDS(ON) ^{= VDS/ID}
1
DC
BUK457-500B
tp = 10 us
100 us
1 ms
10 ms
100 ms
0.1
1
10
100
1000
VDS / V
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Product specification
IRF840
1 ^{Zth j-mb, Transient thermal impedance (K/W) PHP6N60}
D = 0.5
0.2
0.1 ^0.1
0.05
0.02
0.01
single pulse
P_D
tp
D = ^tp
T
T
t
0.0011us
10us 100us 1ms
10ms 100ms
1s
tp, pulse width (s)
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
30 ^{ID, Drain current (Amps)}
Tj = 25 C
25
20
15
10
5
PHP8N50
10 V
7V
6.5 V
6V
5.5 V
5V
VGS = 4.5 V
0
0
5
10
15
20
25
30
VDS, Drain-Source voltage (Volts)
Fig.5. Typical output characteristics.
I_D = f(V_DS); parameter V_GS
2 ^{RDS(on), Drain-Source on resistance (Ohms) PHP8N50}
4.5 V
5V
5.5 V VGS = 6 V ^{Tj = 25 C}
1.5
6.5 V
7V
1
10 V
0.5
0
0
5
10
15
20
25
ID, Drain current (Amps)
Fig.6. Typical on-state resistance.
R_DS(ON) = f(I_D); parameter V_GS
March 1999
3
Rev 1.000