LPC1850_1112 Datasheet, PDF (28/157 Pages) NXP Semiconductors – 32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller

NXP Semiconductors
LPC1850/30/20/10
32-bit ARM Cortex-M3 microcontroller
Table 3. Pin description …continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
Description
P6_0
P6_1
P6_2
M12 x
R15 x
L13 x
H7 105 73 -
G5 107 74 -
J9 111 78 -
[3] _{I; PU - R — Function reserved.}
O I2S0_RX_MCLK — I²S receive master clock.
- R — Function reserved.
- R — Function reserved.
I/O I2S0_RX_SCK — Receive Clock. It is driven by the
master and received by the slave. Corresponds to
the signal SCK in the I²S-bus specification.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
[3] _{I; PU I/O GPIO3[0] — General purpose digital input/output pin.}
O EMC_DYCS1 — SDRAM chip select 1.
I/O U0_UCLK — Serial clock input/output for USART0 in
synchronous mode.
I/O I2S0_RX_WS — Receive Word Select. It is driven by
the master and received by the slave. Corresponds
to the signal WS in the I²S-bus specification.
- R — Function reserved.
I T2_CAP0 — Capture input 2 of timer 2.
- R — Function reserved.
- R — Function reserved.
[3] _{I; PU I/O GPIO3[1] — General purpose digital input/output pin.}
O EMC_CKEOUT1 — SDRAM clock enable 1.
I/O U0_DIR — RS-485/EIA-485 output enable/direction
control for USART0.
I/O I2S0_RX_SDA — I²S Receive data. It is driven by
the transmitter and read by the receiver. Corresponds
to the signal SD in the I²S-bus specification.
- R — Function reserved.
I T2_CAP1 — Capture input 1 of timer 2.
- R — Function reserved.
- R — Function reserved.
LPC1850_30_20_10
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 December 2011
© NXP B.V. 2011. All rights reserved.
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