SAA4952WP Datasheet, PDF (23/32 Pages) NXP Semiconductors – Memory controller

Philips Semiconductors
Memory controller
Objective specification
SAA4952WP
CHARACTERISTICS
V_DD = 5 V; T_amb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS MIN.
V_DD
I_DD
f_acq
f_LLDFL,LLD
C_i
V_IL
V_IH
V_OL
V_OH
T_j
T_amb
supply voltage
4.5
supply current
−
acquisition frequency
−
operating frequency of display and deflection part note 1
24
input capacitance
−
LOW level input voltage
−
HIGH level input voltage
2.0
LOW level output voltage
HIGH level output voltage
I_o = 4 mA; note 2 −
I_o = −4 mA; note 2 2.4
junction temperature
−
operating ambient temperature
0
TYP.
5
35
−
−
10
−
−
−
3.4
−
−
MAX. UNIT
5.5 V
−
mA
33
MHz
37
MHz
15
pF
0.8 V
−
V
0.4 V
−
V
125 °C
85
°C
Notes
1. f_min = 24 MHz for LLDFL, if the data at the microcontroller port P0 to P7, ALE and WRD is supplied from a
microcontroller clocked with 12 MHz.
2. For SRC I_o = ±8 mA.
APPLICATION INFORMATION
Figure 10 illustrates a block diagram of the application
environment of the memory controller SAA4952WP.
The full option chip set of the new TV feature system
controlled by the I²C-bus includes the following circuits:
TDA8755
ADC.
SAA4990H
Progressive scan-Zoom and Noise reduction IC
(PROZONIC) with line flicker reduction.
SAA4991WP
The Motion Estimation/Compensation Line flicker
reduction ZOom and Noise reduction IC is abbreviated as
MELZONIC.
SAA4955TJ
3 Mbit video RAM.
SAA4952WP
Memory controller.
SAA4995WP
PANorama-IC (PAN-IC) for linear horizontal zoom and
compression, non-linear (panorama) horizontal aspect
ratio conversion.
S87C654-4A44
Microcontroller.
SAA7165
VEDA2, DAC with digital CTI and luminance peaking.
1997 Jun 10
23