SAA7390 Datasheet, PDF (22/76 Pages) NXP Semiconductors – High performance Compact Disc-Recordable CD-R controller

Philips Semiconductors
High performance Compact
Disc-Recordable (CD-R) controller
Preliminary specification
SAA7390
Table 11 Microcontroller frame number address registers: 0xF0F6 and 0xF0F7; note 1
DATA BYTE
MNEMONIC R/W
7
6
5
4
3
2
1
0
MICFRM# R/W FRAME7 FRAME6 FRAME5 FRAME4 FRAME3 FRAME2 FRAME1 FRAME0
MICFRM# R/W
−
−
−
−
−
FRAME10 FRAME9 FRAME8
Note
1. Registers 0xF0F6 and 0xF0F7 provide the frame number address for the microcontroller access to memory. The
counter associated with these registers is loaded after the most significant byte is written; the least significant byte
must be written first to ensure that the counter is loaded correctly. If a DRAM access is in progress that uses the
address from the counter, the update will be delayed until the access is complete.
Table 12 Microcontroller address page register: 0xF0FF; note 1
MNEMONIC R/W
PAGEREG R/W
DATA BYTE
7
6
5
4
3
2
1
0
−
MA_21
MA_20
MA_19 MA_18 MA_17 MA_16 MA_15
Note
1. Register 0xF0FF is used by the buffer manager for the upper address lines when the microcontroller addresses
non-frame memory. These registers overlap frame memory, so register 0xF0FF must be programmed with an
address in the top part of the memory if no overlap is required. The microcontroller page address line is selected from
this register. The outputs are used directly to control DRAM access cycles, and will affect any current DRAM cycle
in progress.
It is possible to access three contiguous frames from the
microcontroller by reading the three data sector windows,
0x8000 to 0x8FFF, 0x9000 to 0x9FFF and
0xA000 to 0xAFFF. This function is required for the
decoding of the sub-code information. If the ‘next’ frame
wraps past the last frame pointer (LASTFRM) then the
pointers are modified to wrap back to the start pointer
onwards (FEFRM#); this section is transparent to the
microcontroller.
1996 Jul 02
22