TDA4691 Datasheet, PDF (2/26 Pages) NXP Semiconductors – Sync Processor with Clock SPC

Philips Semiconductors
Sync Processor with Clock (SPC)
Preliminary specification
TDA4691
FEATURES
• Sync processor for horizontal (H)
and vertical (V) sync pulses
generated by internal 13.5 MHz
oscillator
• Stable ‘On Screen Display (OSD)’,
if no input signal is present with free
running internal oscillator;
automatic turn over to locked
oscillator, if input signal is available
• External clock oscillator can be
used
• Standard 50/60 Hz signals are
identified automatically
• Additional outputs for 13.5 MHz,
composite sync, 50//60 Hz
identification, signal identification
(mute), super-sandcastle 12 V
• TTL compatible outputs (H, V,
composite sync and 13.5 MHz)
• 3 different time constants for the
PHI1 PLL: fast, normal and slow
(T₁, T₂ and T₃). Fast and normal
time constant are set independent
from each other
• Start of H-pulse definable by
application
• Digital interference reduction for H
and V signals
• Digital noise detector
• Time correction of non-standard
H-pulses and equalizing pulses for
optimum PLL control.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V_P2
supply voltage
I_P2
supply current
V_P1
supply voltage
I_P1
supply current
P_tot
total power
dissipation
4.5
5.0 5.5 V
−
− 30
mA
7.2
8.0 8.8 V
−
− 30
mA
−
260 430 mW
Inputs
V₂₀
input voltage R_G = 1 kΩ
−
12
V
Outputs
V₄
signal
no signal;
−
− 0.3 V
identification 1 mA
voltage
signal
open −
collector
V_P1
V
V₇
50/60 Hz
50 Hz; 1 mA −
− 0.3 V
voltage
60 Hz
open
−
V_P1
V
collector
V₁₀
vertical output HIGH;
2.7
−
V_P2
V
voltage
−1 to 0 mA
LOW; 2 mA −
− 0.8 V
V₁₁
horizontal
HIGH;
2.7
−
V_P2
V
output voltage −1 to 0 mA
LOW; 2 mA −
− 0.8 V
V₁₃
clock output HIGH;
2.7
−
V_P2
V
voltage
−1 to 0 mA
LOW; 2 mA −
− 0.8 V
ORDERING INFORMATION
GENERAL DESCRIPTION
The TDA4691 is a bipolar integrated
circuit for sync processing in 50/100
and 60/120 Hz TV sets, preferably in
conjunction with the programmable
deflection controller TDA9150. A line
locked 13.5 MHz clock with several
dividers and logic circuitry is available
generating the horizontal and vertical
sync outputs. The device can be
assembled in a DIL20 or SO20
package.
EXTENDED
TYPE NUMBER
TDA4691
TDA4691T
PINS
20
20
PIN
POSITION
DIL
SO
Note
1. SOT146-1; 1996 December 9.
2. SOT4163-1; 1996 December 9.
PACKAGE
MATERIAL
plastic
plastic
CODE
SOT146⁽¹⁾
SOT163⁽²⁾
September 1993
2