BUK7830-30 Datasheet, PDF (2/10 Pages) NXP Semiconductors – TrenchMOS transistor Standard level FET

Philips Semiconductors
TrenchMOS™ transistor
Standard level FET
Product specification
BUK7830-30
ESD LIMITING VALUE
SYMBOL
V_C
PARAMETER
Electrostatic discharge capacitor
voltage, all pins
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
MIN.
-
MAX.
2
UNIT
kV
STATIC CHARACTERISTICS
T_j= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V_(BR)DSS
V_GS(TO)
I_DSS
I_GSS
±V_(BR)GSS
R_DS(ON)
Drain-source breakdown
V_GS = 0 V; I_D = 0.25 mA;
voltage
T_j = -55˚C
Gate threshold voltage
V_DS = V_GS; I_D = 1 mA
T_j = 150˚C
T_j = -55˚C
Zero gate voltage drain current V_DS = 30 V; V_GS = 0 V;
T_j = 150˚C
Gate source leakage current V_GS = ±10 V; V_DS = 0 V
T_j = 150˚C
Gate source breakdown voltage I_G = ±1 mA;
Drain-source on-state
V_GS = 10 V; I_D = 3.2 A
resistance
T_j = 150˚C
MIN.
30
27
2.0
1.0
-
-
-
-
-
16
-
-
TYP.
-
-
3.0
-
-
0.05
-
0.02
-
-
24
-
MAX.
-
-
4.0
-
4.4
10
500
1
20
-
30
51
UNIT
V
V
V
V
µA
µA
µA
µA
V
mΩ
mΩ
DYNAMIC CHARACTERISTICS
T_j = 25˚C unless otherwise specified
SYMBOL PARAMETER
g_fs
Q_g(tot)
Q_gs
Q_gd
C_iss
C_oss
C_rss
t_{d on}
t_r
t_{d off}
t_f
L_d
Forward transconductance
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
Input capacitance
Output capacitance
Feedback capacitance
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
L_d
Internal drain inductance
L_s
Internal source inductance
CONDITIONS
V_DS = 25 V; I_D = 5.9 A
I_D = 5.9 A; V_DD = 24 V; V_GS = 10 V
V_GS = 0 V; V_DS = 25 V; f = 1 MHz
V_DD = 15 V; I_D = 5.9 A;
V_GS = 10 V; R_G = 5 Ω
Resistive load
Measured from contact screw on
tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
MIN.
5
-
-
-
-
-
-
-
-
-
-
-
TYP.
10
22.5
4.5
9
740
270
130
16
30
35
25
3.5
MAX.
-
-
-
-
-
-
-
22
60
50
38
-
UNIT
S
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
-
4.5
-
nH
-
7.5
-
nH
December 1997
2
Rev 1.100