BUK7222-55A_15 Datasheet, PDF (2/13 Pages) NXP Semiconductors – N-channel TrenchMOS standard level FET

NXP Semiconductors
BUK7222-55A
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
gate
D
drain
S
source
D
mounting base; connected to
drain
Simplified outline
mb
2
1
3
SOT428 (DPAK)
3. Ordering information
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
BUK7222-55A
DPAK
4. Limiting values
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
V_DS
V_DGR
V_GS
I_D
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T_j ≥ 25 °C; T_j ≤ 175 °C
R_GS = 20 kΩ
T_mb = 100 °C; V_GS = 10 V; see Figure 1
T_mb = 25 °C; V_GS = 10 V; see Figure 1;
see Figure 3
I_DM
peak drain current
T_mb = 25 °C; pulsed; t_p ≤ 10 µs;
see Figure 3
P_tot
total power dissipation
T_stg
storage temperature
T_j
junction temperature
Source-drain diode
T_mb = 25 °C; see Figure 2
I_S
source current
I_SM
peak source current
Avalanche ruggedness
T_mb = 25 °C
pulsed; t_p ≤ 10 µs; T_mb = 25 °C
E_DS(AL)S
non-repetitive drain-source
avalanche energy
I_D = 48 A; V_sup ≤ 55 V; R_GS = 50 Ω;
V_GS = 10 V; T_j(init) = 25 °C; unclamped
[1] Peak drain current is limited by chip, not package.
Min Max Unit
-
55 V
-
55 V
-20 20 V
-
34 A
-
48 A
[1] _-
193 A
-
103 W
-55 175 °C
-55 175 °C
-
48 A
-
193 A
-
160 mJ
BUK7222-55A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 23 February 2011
© NXP B.V. 2011. All rights reserved.
2 of 13