74HC4516 Datasheet, PDF (2/14 Pages) NXP Semiconductors – Binary up/down counter

Philips Semiconductors
Binary up/down counter
Product specification
74HC/HCT4516
FEATURES
• Output capability: standard
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4516 are high-speed Si-gate CMOS
devices and are pin compatible with the “4516” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4516 are edge-triggered synchronous
up/down 4-bit binary counters with a clock input (CP), an
up/down count control input (UP/DN), an active LOW
count enable input (CE), an asynchronous active HIGH
parallel load input (PL), four parallel inputs (D₀ to D₃), four
parallel outputs (Q₀ to Q₃), an active LOW terminal count
output (TC), and an overriding asynchronous master reset
input (MR).
Information on D₀ to D₃ is loaded into the counter while PL
is HIGH, independent of all other input conditions except
the MR input, which must be LOW. When PL and CE are
LOW, the counter changes on the LOW-to-HIGH transition
of CP. UP/DN determines the direction of the count, HIGH
for counting up, LOW for counting down. When counting
up, TC is LOW when Q₀ to Q₃ are HIGH and CE is LOW.
When counting down, TC is LOW when Q₀ to Q₃ and CE
are LOW. A HIGH on MR resets the counter (Q₀ to
Q₃ = LOW) independent of all other input conditions.
Logic equation for terminal count:
TC = CE . {(UP/DN) . Q₀ . Q₁ . Q₂ . Q₃ + (UP ⁄ DN) . Q₀ . Q₁ . Q₂ . Q₃}
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
HC
HCT
t_PHL/ t_PLH
f_max
C_I
C_PD
propagation delay CP to Q_n
maximum clock frequency
19
19
C_L = 15 pF; V_CC = 5 V ₄₅
57
input capacitance
3.5
3.5
power dissipation capacitance per package notes 1 and 2
59
61
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
UNIT
ns
MHz
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2