74HC4516 Datasheet, PDF (11/14 Pages) NXP Semiconductors – Binary up/down counter

Philips Semiconductors
Binary up/down counter
AC WAVEFORMS
Product specification
74HC/HCT4516
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7
Waveforms showing the clock (CP) to
output (Q_n) and terminal count (TC)
propagation delays, the clock pulse width
and the maximum clock pulse frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8
Waveforms showing the set-up and hold
times form count enable (CE) and up/down
(UP/DN) control inputs to the clock pulse
(CP), the propagation delays from UP/DN,
CE to TC.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing the preset enable
pulse width, preset enable to output
delays and output transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.10 Waveforms showing the master reset pulse,
master reset to terminal count and Q_n
delay and master reset to clock removal
time.
December 1990
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