74F5074 Datasheet, PDF (2/12 Pages) NXP Semiconductors – Synchronizing dual D-type flip-flop/clock driver

Philips Semiconductors
Synchronizing dual D-type flip-flop/clock driver
Product specification
74F5074
FEATURES
• Metastable immune characteristics
• Output skew guaranteed less than 1.5ns
• High source current (I_OH = 15mA) ideal for clock driver
applications
• Pin out compatible with 74F74
• 74F50728 for synchronizing cascaded D–type flip–flop
• See 74F50729 for synchronizing dual D–type flip–flop with
edge–triggered set and reset
• See 74F50109 for synchronizing dual J–K positive
edge–triggered flip–flop
• Industrial temperature range available (–40°C to +85°C)
TYPE
74F5074
TYPICAL f_max
120MHz
TYPICAL SUPPLY
CURRENT (TOTAL)
20mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
14–pin plastic DIP
COMMERCIAL RANGE
V_CC = 5V ±10%,
T_amb = 0°C to +70°C
N74F5074N
14–pin plastic SO
N74F5074D
PKG DWG #
SOT27-1
SOT108-1
PIN CONFIGURATION
RD0 ¹
D0 2
CP0 3
SD0 ⁴
Q0 5
Q0 6
GND 7
14 VCC
13 _RD1
12 D1
11 CP1
10 SD1
9 Q1
8 _Q1
SF00582
IEC/IEEE SYMBOL
2 12
D0 D1
3
CP0
4
SD0
1
RD0
11
CP1
10
SD1
13
RD1
Q0 Q0 Q1 Q1
V_CC = Pin 14
GND = Pin 7
56 98
SF00583
INPUT AND OUTPUT LOADING
AND FAN OUT TABLE
PINS
DESCRIPTION
74F
(U.L.)
HIGH/
LOW
LOAD VAL-
UE HIGH/
LOW
D0, D1 Data inputs
1.0/0.417 20µA/250µA
CP0, CP1
Clock inputs (active
rising edge)
1.0/1.0 20µA/20µA
SD0, SD1 Set inputs (active low) 1.0/1.0 20µA/20µA
RD0, RD1
Reset inputs (active
low)
1.0/1.0 20µA/20µA
Q0, Q1, Q0,
Q1
Data outputs
750/33 _15mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high
state and 0.6mA in the low state.
LOGIC SYMBOL
4
&
S
3
C1
2
1D
1
R
10
S
11
C2
12
2D
13
R
3
6
9
8
SF00584
September 14, 1990
2
853-1391 00419