83C752 Datasheet, PDF (16/24 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, I2C, PWM, low pin count

Philips Semiconductors
80C51 8-bit microcontroller family
2K/64 OTP/ROM, 5 channel 8 bit A/D, I²C, PWM, low pin count
Product specification
83C752/87C752
22
20
18
16
14
I_CC mA ¹²
10
8
6
4
2
MAX ACTIVE I_CC6
TYP ACTIVE I_CC6
MAX IDLE I_CC7
TYP IDLE I_CC7
4MHz
8MHz 12MHz 16MHz
FREQ
SU00308
Figure 6. I_CC vs. FREQ
Maximum I_CC values taken at V_CC = 5.5V and worst case temperature.
Typical I_CC values taken at V_CC = 5.0V and 25°C.
Notes 6 and 7 refer to AC Electrical Characteristics.
PROGRAMMING CONSIDERATIONS
EPROM Characteristics
The 87C752 is programmed by using a modified Quick-Pulse
Programming algorithm similar to that used for devices such as the
87C451 and 87C51. It differs from these devices in that a serial data
stream is used to place the 87C752 in the programming mode.
Figure 7 shows a block diagram of the programming configuration
for the 87C752. Port pin P0.2 is used as the programming voltage
supply input (V_PP signal). Port pin P0.1 is used as the program
(PGM/) signal. This pin is used for the 25 programming pulses.
Port 3 is used as the address input for the byte to be programmed
and accepts both the high and low components of the eleven bit
address. Multiplexing of these address components is performed
using the ASEL input. The user should drive the ASEL input high
and then drive port 3 with the high order bits of the address. ASEL
should remain high for at least 13 clock cycles. ASEL may then be
driven low which latches the high order bits of the address internally.
The high address should remain on port 3 for at least two clock
cycles after ASEL is driven low. Port 3 may then be driven with the
low byte of the address. The low address will be internally stable 13
clock cycles later. The address will remain stable provided that the
low byte placed on port 3 is held stable and ASEL is kept low. Note:
ASEL needs to be pulsed high only to change the high byte of the
address.
Port 1 is used as a bidirectional data bus during programming and
verify operations. During programming mode, it accepts the byte to
be programmed. During verify mode, it provides the contents of the
EPROM location specified by the address which has been supplied
to Port 3.
The XTAL1 pin is the oscillator input and receives the master system
clock. This clock should be between 1.2 and 6MHz.
The RESET pin is used to accept the serial data stream that places
the 87C752 into various programming modes. This pattern consists
of a 10-bit code with the LSB sent first. Each bit is synchronized to
the clock input, X1.
Programming Operation
Figures 8 and 9 show the timing diagrams for the program/verify
cycle. RESET should initially be held high for at least two machine
cycles. P0.1 (PGM/) and P0.2 (V_PP) will be at V_OH as a result of the
RESET operation. At this point, these pins function as normal
quasi-bidirectional I/O ports and the programming equipment may
pull these lines low. However, prior to sending the 10-bit code on the
RESET pin, the programming equipment should drive these pins
high (V_IH). The RESET pin may now be used as the serial data input
for the data stream which places the 87C752 in the programming
mode. Data bits are sampled during the clock high time and thus
should only change during the time that the clock is low. Following
transmission of the last data bit, the RESET pin should be held low.
Next the address information for the location to be programmed is
placed on port 3 and ASEL is used to perform the address
multiplexing, as previously described. At this time, port 1 functions
as an output.
1998 May 01
16