TDA8050A Datasheet, PDF (15/28 Pages) NXP Semiconductors – QPSK transmitter

Philips Semiconductors
QPSK transmitter
Product specification
TDA8050A
Table 2 Modulator reference divider ratio
MP1
1
1
0
MP0
1
0
1
PROGRAMMED RATIO
4
8
16
Table 3 Converter synthesizer charge pump current
CR2
0
0
0
0
0
0
1
CR1
0
0
0
0
1
1
0
CR0
0
0
1
1
0
1
0
LOCK_CONV⁽¹⁾
0
1
0
1
X
X
X
I_CP(mA)
1.2
0.36
0.36
0.1
0.1
0.36
1.2
Note
1. LOCK_CONV is an internal signal. When at logic 0, converter PLL is out-of-lock. When at logic 1, converter PLL is
in-lock.
Table 4 Converter synthesizer
f_comp = f_osc/RD.
f_osc\f_comp
1 MHz
4 MHz
25 kHz
40
160
50 kHz
20
80
125 kHz
8
32
Table 5 Converter synthesizer;
ND = 4 f_lo = ND × NDR × f_comp = NDR × step.
f_lo\step
145 MHz
205 MHz
100 kHz
1 450
2 050
200 kHz
725
1 025
500 kHz
290
410
1999 Nov 05
15