80C552 Datasheet, PDF (15/23 Pages) NXP Semiconductors – Single-chip 8-bit microcontroller

Philips Semiconductors
Single-chip 8-bit microcontroller with 10-bit A/D,
capture/compare timer, high-speed outputs, PWM
Product data
80C552/83C552
AC ELECTRICAL CHARACTERISTICS (Continued)
SYMBOL
PARAMETER
INPUT
OUTPUT
I²C Interface (Refer to Figure 9)
t_HD;STA
t_LOW
t_HIGH
t_RC
t_FC
START condition hold time
SCL low time
SCL high time
SCL rise time
SCL fall time
≥ 14 t_CLCL
≥ 16 t_CLCL
≥ 14 t_CLCL
≤ 1 µs
≤ 0.3 µs
> 4.0 µs ¹
> 4.7 µs ¹
> 4.0 µs ¹
–²
< 0.3 µs ³
t_SU;DAT1
t_SU;DAT2
Data set-up time
SDA set-up time (before rep. START cond.)
≥ 250ns
≥ 250ns
> 20 t_CLCL – t_RD
> 1 µs ¹
t_SU;DAT3 SDA set-up time (before STOP cond.)
≥ 250ns
> 8 t_CLCL
t_HD;DAT
Data hold time
≥ 0ns
> 8 t_CLCL – t_FC
t_SU;STA
Repeated START set-up time
≥ 14 t_CLCL
> 4.7 µs ¹
t_SU;STO STOP condition set-up time
≥ 14 t_CLCL
> 4.0 µs ¹
t_BUF
Bus free time
≥ 14 t_CLCL
> 4.7 µs ¹
t_RD
SDA rise time
≤ 1 µs
–²
t_FD
SDA fall time
≤ 0.3 µs
< 0.3 µs ³
NOTES:
1. At 100 kbit/s. At other bit rates this value is inversely proportional to the bit-rate of 100 kbit/s.
2. Determined by the external bus-line capacitance and the external bus-line pull-resistor, this must be < 1 µs.
3. Spikes on the SDA and SCL lines with a duration of less than 3 t_CLCL will be filtered out. Maximum capacitance on bus-lines SDA and
SCL = 400 pF.
4. t_CLCL = 1/f_OSC = one oscillator clock period at pin XTAL1. For 62 ns, 42 ns < t_CLCL < 285 ns (16 MHz, 24 MHz > f_OSC > 3.5 MHz) the SI01
interface meets the I²C-bus specification for bit-rates up to 100 kbit/s.
2002 Sep 03
15