74VHC_VHCT595_15 Datasheet, PDF (15/22 Pages) NXP Semiconductors – 8-bit serial-in/serial-out or parallel-out shift register with output latches

NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
t_W
V_{I 90 %}
negative
pulse
V_M
10 %
0V
t_f
V_I
positive
pulse
t_r
90 %
V_M
10 %
0V
t_W
V_M
t_r
t_f
V_M
VI
G
V_CC
VO
DUT
RT
V_CC
RL S1
CL
open
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Test data is given in Table 9.
Definitions for test circuit:
C_L = load capacitance including jig and probe capacitance.
R_L = load resistance.
R_T = termination resistance should be equal to the output impedance Z_o of the pulse generator.
S1 = test selection switch.
Fig 13. Load circuitry for switching times
Table 9. Test data
Type
Input
74VHC595
74VHCT595
V_I
V_CC
3.0 V
t_r, t_f
 3.0 ns
 3.0 ns
Load
C_L
15 pF, 50 pF
15 pF, 50 pF
R_L
1 k
1 k
S1 position
t_PHL, t_PLH
open
open
t_PZH, t_PHZ
GND
GND
t_PZL, t_PLZ
V_CC
V_CC
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
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