74VHC_VHCT595_15 Datasheet, PDF (13/22 Pages) NXP Semiconductors – 8-bit serial-in/serial-out or parallel-out shift register with output latches

NXP Semiconductors
74VHC595; 74VHCT595
8-bit serial-in/serial-out or parallel-out shift register with output latches
V_I
SHCP input
GND
V_I
DS input
GND
V_M
t _su
t_h
V_M
t _su
t_h
V_OH
Q7S output
V_OL
V_M
mna560
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V_OL and V_OH are typical output voltage levels that occur with the output load.
Fig 10. Data set-up and hold times
V_I
MR input
GND
V_I
SHCP input
GND
V_OH
Q7S output
V_OL
V_M
t_W
t _rec
V_M
t _PHL
V_M
Measurement points are given in Table 8.
V_OL and V_OH are typical output voltage levels that occur with the output load.
Fig 11. Master reset to output propagation delays
mna561
74VHC_VHCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2012
© NXP B.V. 2012. All rights reserved.
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