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74HC74 Datasheet, PDF (14/22 Pages) NXP Semiconductors – Dual D-type flip-flop with set and reset; positive-edge trigger | |||
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Philips Semiconductors
Dual D-type ï¬ip-ï¬op with set and reset;
positive-edge trigger
Product speciï¬cation
74HC74; 74HCT74
handbook, full pagewidth
VI
nCP input
GND
VI
nSD input
GND
VI
nRD input
GND
VOH
nQ output
VOL
VOH
nQ output
VOL
VM
tW
t PLH
VM
VM
t PHL
VM
t rem
tW
VM
t PHL
t PLH
MNA423
74HC74: VM = 50%; VI = GND to VCC.
74HCT74: VM = 1.3 V; VI = GND to 3 V.
Fig.8 The set (nSD) and reset (nRD) input to output (nQ, nQ) propagation delays, the set and reset pulse widths
and the nRD, nRD to nCP removal time.
2003 Jul 10
14
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