74HC283N Datasheet, PDF (13/20 Pages) NXP Semiconductors – 4-bit binary full adder with fast carry

Philips Semiconductors
74HC283
4-bit binary full adder with fast carry
the second stage on S3. As long as A3 and B3 are the same, HIGH or LOW, they do not
influence S3. Similarly, when A3 and B3 are the same, the carry into the third stage does
not influence the carry out of the third stage.
L
COUT
B4
S4 ^C3
A4
B3
S3
A3
B2
S2
A2
B1
S1
A1
CIN
001aab900
C1
COUT
B10 _B4
A10 _A4
S4 ^S10
C10 _B3
A3
S3 ^C2
B2 _B2
A2 _A2
B1 _B1
A1 _A1
S2 ^S2
S1 ^S1
CIN
CIN
001aab901
Fig 8. 3-bit adder
Fig 9. 2-bit and 1-bit adder
Figure 10 shows a method of implementing a 5-input encoder, where the inputs are
equally weighted. The outputs S1, S2 and S3 produce a binary number equal to the
number inputs (I1 to I5) that are HIGH.
Figure 11 shows a method of implementing a 5-input majority gate. When three or more
inputs (I1 to I5) are HIGH, the output M5 is HIGH.
COUT
I5 _B4
I4 _A4
S4
I3 _B3
S3
A3
B2
L _A2
S2
I2 _B1
I1 _A1
S1
CIN
001aab902
Fig 10. 5-input encoder
COUT
I5 _B4
I4 _A4
S4
I3 _B3
A3
S3
M5
B2
S2
A2
I2 _B1
I1 _A1
S1
CIN
001aab903
Fig 11. 5-input majority gate
9397 750 13811
Product data sheet
Rev. 03 — 11 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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