TDA8426 Datasheet, PDF (12/24 Pages) NXP Semiconductors – Hi-fi stereo audio processor; I2C-bus

Philips Semiconductors
Hi-fi stereo audio processor; I²C-bus
Product specification
TDA8426
PARAMETER
Crosstalk between inputs at gain = 0 dB;
1 kHz; opposite inputs grounded (50 Ω);
IN1L (pin 18) to IN2L (pin 1) or
IN1R (pin 20) to IN2R (pin 3)
Total harmonic distortion
(f = 20 Hz to 12.5 kHz)
for V_i(rms) = 0.3 V;
gain = +6 dB to −40 dB
for V_i(rms) = 0.6 V;
gain = 0 dB to −40 dB
for V_i(rms) = 2.0 V;
gain = −12 dB to −40 dB
Channel separation at 10 kHz
gain = 0 dB
Ripple rejection (gain = 0 dB;
bass and treble in linear position)
f_ripple = 100 Hz
Crosstalk attenuation from logic
inputs to AF outputs (gain = 0 dB;
bass and treble in linear position)
VOLUME CONTROL
For truth table see Table 6
Control range at f = 1 kHz (36 steps)
maximum voltage gain (6 dB step)
minimum voltage gain (−64 dB step)
mute position
Gain tracking error; balance in mid-position
Step resolution
gain from 6 dB to −40 dB
gain from −42 dB to −64 dB
TREBLE CONTROL
For truth table see Table 8
Control range
for C_8-5; C_14-5 = 5.6 nF
Maximum emphasis at 15 kHz with
respect to linear position
Maximum attenuation at 15 kHz with
respect to linear position
Resolution
SYMBOL
MIN.
TYP.
MAX.
UNIT
α_cr
−
THD
−
THD
−
THD
−
α_cs
−
RR₁₀₀
−
α_L
−
100
−
dB
0.05
−
%
0.07
0.4
%
0.1
−
%
80
−
dB
50
−
dB
100
−
dB
G_max
G_min
G_mute
G
G_step
G_step
5
6
−
−63
−64
−
−80
−90
−
−
−
2
1.5
2.0
2.5
1.0
2.0
3.0
dB
dB
dB
dB
dB/step
dB/step
G
G
G_step
11
12
13
dB
11
12
13
dB
2.5
3.0
3.5
dB/step
March 1991
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