TDA8426 Datasheet, PDF (11/24 Pages) NXP Semiconductors – Hi-fi stereo audio processor; I2C-bus

Philips Semiconductors
Hi-fi stereo audio processor; I²C-bus
Product specification
TDA8426
AC CHARACTERISTICS⁽¹⁾
V_CC = 12 V; bass/treble in linear position; pseudo and spatial stereo off; R_L > 10 kΩ; C_L < 1000 pF;
T_amb = 25 °C; unless otherwise specified
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
I²C-bus timing (see Fig.7)
SDA, SCL (pin 11 and 12)
Clock frequency range
The HIGH period of the clock
The LOW period of the clock
SCL rise time
SCL fall time
Set-up time for start condition
Hold time for start condition
Set-up time for stop condition
Time bus must be free before
a new transmission can start
Set-up time DATA
f_SCL
t_HIGH
t_LOW
t_r
t_f
t_{SU; STA}
t_{HD; STA}
t_{SU; STO}
t_BUF
t_{SU; DAT}
0
−
4
−
4.7
−
−
−
−
−
4.7
−
4
−
4.7
−
4.7
−
250
−
INPUTS
IN1 L (pin 18) IN1 R (pin 20);
IN2 L (pin 1) IN2 R (pin 3)
Input signal handling (RMS value)
at V_u = −12 dB; THD ≤ 0.5%
Input resistance
Frequency response (−0,5 dB)
bass and treble in linear position;
stereo mode; effects off
V_i(rms)
R_i
f
2
−
20
30
20
−
OUTPUTS
OUT R (pin 9); OUT L (pin 13)
Output voltage range (rms value)
at THD ≤ 0.7%; V_i(max) ≤ 2 V
Load resistance
Output impedance
Signal plus noise-to-noise ratio (weighted
V_o(rms)
R_L
Z_O
0.6
−
10
−
−
−
according to CCIR 468-2); V_o = 600 mV
gain = 6 dB
(S+N)/N
−
78
gain = 0 dB
(S+N)/N
−
86
gain = ≤ −20 dB
(S+N)/N
−
68
100
−
−
1
0.3
−
−
−
−
−
−
40
20 000
−
−
100
−
−
−
UNIT
kHz
µs
µs
µs
µs
µs
µs
µs
µs
ns
V
kΩ
Hz
V
kΩ
Ω
dB
dB
dB
March 1991
11