SC16C752B Datasheet, PDF (12/47 Pages) NXP Semiconductors – 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs

Philips Semiconductors
SC16C752B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
6.4 Reset
Table 4 summarizes the state of register after reset.
Table 4: Register reset functions
Register
Reset control
Interrupt enable register
RESET
Interrupt identification register RESET
FIFO control register
RESET
Line control register
RESET
Modem control register
RESET
Line status register
RESET
Modem status register
RESET
Enhanced feature register
RESET
Receiver holding register
RESET
Transmitter holding register
RESET
Transmission control register
RESET
Trigger level register
RESET
Reset state
All bits cleared.
Bit 0 is set. All other bits cleared.
All bits cleared.
Reset to 00011101 (1D hex).
All bits cleared.
Bits 5 and 6 set. All other bits cleared.
Bits 0-3 cleared. Bits 4-7 input signals.
All bits cleared.
Pointer logic cleared.
Pointer logic cleared.
All bits cleared.
All bits cleared.
[1] Registers DLL, DLH, SPR, Xon1, Xon2, Xoff1, Xoff2 are not reset by the top-level reset signal
RESET, i.e., they hold their initialization values during reset.
Table 5 summarizes the state of registers after reset.
Table 5:
Signal
TX
RTS
DTR
RXRDY
TXRDY
Signal RESET functions
Reset control
RESET
RESET
RESET
RESET
RESET
Reset state
high
high
high
high
low
9397 750 14443
Product data
Rev. 03 — 14 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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