SA605_15 Datasheet, PDF (12/25 Pages) NXP Semiconductors – High performance low power mixer FM IF system

NXP Semiconductors
SA605
High performance low power mixer FM IF system
11.1 Circuit description
The SA605 is an IF signal processing system suitable for second IF or single conversion
systems with input frequency as high as 1 GHz. The bandwidth of the IF amplifier is about
40 MHz, with 39.7 dB of gain from a 50  source. The bandwidth of the limiter is about
28 MHz with about 62.5 dB of gain from a 50  source. However, the gain/bandwidth
distribution is optimized for 455 kHz, 1.5 k source applications. The overall system is
well-suited to battery operation as well as high-performance and high-quality products of
all types.
The input stage is a Gilbert cell mixer with oscillator. Typical mixer characteristics include
a noise figure of 5 dB, conversion gain of 13 dB, and input third-order intercept of
10 dBm. The oscillator operates in excess of 1 GHz in L/C tank configurations. Hartley or
Colpitts circuits can be used up to 100 MHz for crystal configurations. Butler oscillators
are recommended for crystal configurations up to 150 MHz.
The output of the mixer is internally loaded with a 1.5 k resistor, permitting direct
connection to a 455 kHz ceramic filter. The input resistance of the limiting IF amplifiers is
also 1.5 k. With most 455 kHz ceramic filters and many crystal filters, no impedance
matching network is necessary. To achieve optimum linearity of the log signal strength
indicator, there must be a 12 dBV insertion loss between the first and second IF stages. If
the IF filter or inter-stage network does not cause 12 dBV insertion loss, a fixed or variable
resistor can be added between the first IF output (pin 16, IF_AMP_OUT) and the
inter-stage network.
The signal from the second limiting amplifier goes to a Gilbert cell quadrature detector.
One port of the Gilbert cell is internally driven by the IF. The other output of the IF is
AC-coupled to a tuned quadrature network. This signal, which now has a 90 phase
relationship to the internal signal, drives the other port of the multiplier cell.
Overall, the IF section has a gain of 90 dB. For operation at intermediate frequencies
greater than 455 kHz, special care must be given to layout, termination, and inter-stage
loss to avoid instability.
The demodulated output of the quadrature detector is available at two pins, one
continuous and one with a mute switch. Signal attenuation with the mute activated is
greater than 60 dB. The mute input is very high-impedance and is compatible with CMOS
or TTL levels.
A log signal strength completes the circuitry. The output range is greater than 90 dB and is
temperature compensated. This log signal strength indicator exceeds the criteria for
AMPS or TACS cellular telephone.
Remark: dBV = 20log V_O / V_I.
SA605
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 14 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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