ISP1761BEUM Datasheet, PDF (12/164 Pages) NXP Semiconductors – Hi-Speed Universal Serial Bus On-The-Go controller

NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
Table 2. Pin description …continued
Symbol^[1][2]
Pin
Type^[3]
LQFP128 TFBGA128
A2
84
H15
I
REG1V8
85
G16
P
A3
A4
GNDC
A5
GNDD
A6
A7
A8
V_CC(I/O)
A9
A10
A11
A12
GNDD
A13
A14
A15
A16
V_CC(I/O)
A17
86
H14
I
87
F16
I
88
G15
-
89
F15
I
90
E16
-
91
F14
I
92
E15
I
93
D16
I
94
D15
P
95
C16
I
96
C15
I
97
B16
I
98
B15
I
99
A16
-
100
A15
I
101
B14
I
102
A14
I
103
A13
I
104
B13
P
105
C12
I
Description
address pin 2
input, 3.3 V tolerant
core power output (1.8 V); internal 1.8 V for the digital core; used for
decoupling; connect a 100 nF capacitor and a 4.7 µF-to-10 µF
capacitor; see Section 7.7
address pin 3
input, 3.3 V tolerant
address pin 4
input, 3.3 V tolerant
core ground
address pin 5
input, 3.3 V tolerant
digital ground
address pin 6
input, 3.3 V tolerant
address pin 7
input, 3.3 V tolerant
address pin 8
input, 3.3 V tolerant
digital supply voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling
capacitor; see Section 7.7
address pin 9
input, 3.3 V tolerant
address pin 10
input, 3.3 V tolerant
address pin 11
input, 3.3 V tolerant
address pin 12
input, 3.3 V tolerant
digital ground
address pin 13
input, 3.3 V tolerant
address pin 14
input, 3.3 V tolerant
address pin 15
input, 3.3 V tolerant
address pin 16
input, 3.3 V tolerant
digital voltage; 1.65 V to 3.6 V; connect a 100 nF decoupling
capacitor; see Section 7.7
address pin 17
input, 3.3 V tolerant
ISP1761_5
Product data sheet
Rev. 05 — 13 March 2008
© NXP B.V. 2008. All rights reserved.
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