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| LPC4350_12 Datasheet, PDF (110/149 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals | |||
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NXP Semiconductors
LPC4350/30/20/10
32-bit ARM Cortex-M4/M0 microcontroller
SCK (CPOL = 0)
SCK (CPOL = 1)
MOSI
MISO
Tcy(clk)
tclk(H)
tclk(L)
tv(Q)
DATA VALID
DATA VALID
DATA VALID
tDS
tDH
DATA VALID
th(Q)
CPHA = 1
MOSI
MISO
tv(Q)
DATA VALID
DATA VALID
DATA VALID
tDS
tDH
DATA VALID
th(Q)
Fig 27. SSP master timing in SPI mode
CPHA = 0
002aae829
LPC4350_30_20_10
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 â 5 January 2012
© NXP B.V. 2012. All rights reserved.
110 of 149
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