SC16C2552 Datasheet, PDF (11/38 Pages) NXP Semiconductors – Dual UART with 16-byte transmit and receive FIFOs

Philips Semiconductors
SC16C2552
Dual UART with 16-byte transmit and receive FIFOs
SC16C2552
D0–D7
IOR
IOW
RESET
DATA BUS
AND
CONTROL LOGIC
A0–A2
CS
CHSEL
REGISTER
SELECT
LOGIC
INTA, INTB
TXRDYA, TXRDYB
RXRDYA, RXRDYB
INTERRUPT
CONTROL
LOGIC
Fig 4. Internal loop-back mode diagram.
TRANSMIT
FIFO
REGISTERS
TRANSMIT
SHIFT
REGISTER
TXA, TXB
MCR[4] = 1
RECEIVE
FIFO
REGISTERS
CLOCK AND
BAUD RATE
GENERATOR
XTAL1 XTAL2
RECEIVE
SHIFT
REGISTER
RXA, RXB
MODEM
CONTROL
LOGIC
RTSA, RTSB
DSRA, DSRB
DTRA, DTRB
CTSA, CTSB
OP1A, OP1B
RIA, RIB
OP2A, OP2B
CDA, CDB
002aaa126
9397 750 11636
Product data
Rev. 03 — 20 June 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
11 of 38